Model Overview

This model, adpretko/armv8_to_riscv_qwen25coder_3p0b_full, is a specialized fine-tuned variant of the Qwen2.5-Coder-3B-Instruct base model. Its core purpose is to translate or convert code snippets from the ARMv8 instruction set architecture to RISC-V. This makes it a highly focused tool for developers working on cross-architecture compatibility or migration projects.

Key Characteristics

• Base Model: Fine-tuned from Qwen/Qwen2.5-Coder-3B-Instruct.
• Specialization: Dedicated to ARMv8 to RISC-V code translation.
• Training Data: Trained on multiple armv8_to_riscv datasets (000 through 006).

Training Details

The model underwent a focused training regimen with the following hyperparameters:

• Learning Rate: 2e-05
• Optimizer: AdamW with default betas and epsilon
• Epochs: 0.5
• Batch Size: 1 (train), 8 (eval) with 8 gradient accumulation steps
• Scheduler: Cosine learning rate scheduler with 0.03 warmup ratio

Intended Use Cases

This model is particularly well-suited for:

• Code Migration: Assisting in the conversion of ARMv8 assembly or low-level code to RISC-V.
• Cross-Architecture Development: Supporting developers who need to understand or adapt code between these two architectures.
• Research: Exploring automated code translation techniques for different instruction sets.