adpretko/armv8_to_riscv_qwen25coder_3p0b_full

Hugging Face
TEXT GENERATIONConcurrency Cost:1Model Size:3.1BQuant:BF16Ctx Length:32kPublished:Mar 25, 2026License:otherArchitecture:Transformer Warm

adpretko/armv8_to_riscv_qwen25coder_3p0b_full is a fine-tuned version of the Qwen2.5-Coder-3B-Instruct model, developed by adpretko. This model specializes in code translation, specifically from ARMv8 to RISC-V architectures. It was trained on a series of dedicated armv8_to_riscv datasets, making it suitable for tasks involving cross-architecture code conversion. Its primary application is in facilitating the migration or understanding of code between these two distinct instruction set architectures.

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Model Overview

This model, adpretko/armv8_to_riscv_qwen25coder_3p0b_full, is a specialized fine-tuned variant of the Qwen2.5-Coder-3B-Instruct base model. Its core purpose is to translate or convert code snippets from the ARMv8 instruction set architecture to RISC-V. This makes it a highly focused tool for developers working on cross-architecture compatibility or migration projects.

Key Characteristics

  • Base Model: Fine-tuned from Qwen/Qwen2.5-Coder-3B-Instruct.
  • Specialization: Dedicated to ARMv8 to RISC-V code translation.
  • Training Data: Trained on multiple armv8_to_riscv datasets (000 through 006).

Training Details

The model underwent a focused training regimen with the following hyperparameters:

  • Learning Rate: 2e-05
  • Optimizer: AdamW with default betas and epsilon
  • Epochs: 0.5
  • Batch Size: 1 (train), 8 (eval) with 8 gradient accumulation steps
  • Scheduler: Cosine learning rate scheduler with 0.03 warmup ratio

Intended Use Cases

This model is particularly well-suited for:

  • Code Migration: Assisting in the conversion of ARMv8 assembly or low-level code to RISC-V.
  • Cross-Architecture Development: Supporting developers who need to understand or adapt code between these two architectures.
  • Research: Exploring automated code translation techniques for different instruction sets.