adpretko/riscv_to_armv8mac_qwen25coder_0p5b_full

Hugging Face
TEXT GENERATIONConcurrency Cost:1Model Size:0.5BQuant:BF16Ctx Length:32kPublished:Mar 26, 2026License:otherArchitecture:Transformer Warm

The adpretko/riscv_to_armv8mac_qwen25coder_0p5b_full model is a 0.5 billion parameter language model fine-tuned from Qwen/Qwen2.5-Coder-0.5B-Instruct. It specializes in code translation, specifically from RISC-V to ARMv8-A (macOS assembly), leveraging a 32768 token context length. This model is designed for developers working on cross-architecture code migration and optimization tasks. Its primary strength lies in generating ARMv8-A assembly code from RISC-V inputs.

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Model Overview

This model, adpretko/riscv_to_armv8mac_qwen25coder_0p5b_full, is a specialized fine-tuned version of the Qwen2.5-Coder-0.5B-Instruct base model. It has 0.5 billion parameters and supports a substantial context length of 32768 tokens, making it suitable for processing larger code segments.

Key Capabilities

  • Cross-Architecture Code Translation: Specifically fine-tuned for translating code from RISC-V to ARMv8-A (macOS assembly).
  • Instruction-Following: Inherits instruction-following capabilities from its Qwen2.5-Coder-Instruct base, adapted for code generation tasks.
  • Code Generation: Optimized for generating assembly code based on the provided input and fine-tuning datasets.

Training Details

The model was fine-tuned on a series of custom datasets: riscv_to_armv8mac_000 through riscv_to_armv8mac_006. Key training hyperparameters included a learning rate of 2e-05, a total batch size of 8 (with gradient accumulation), and a cosine learning rate scheduler over 0.5 epochs. The training utilized Transformers 4.46.1 and Pytorch 2.5.1+cu121.

Intended Use Cases

This model is particularly well-suited for:

  • RISC-V to ARMv8-A Migration: Assisting in the conversion of RISC-V assembly or related code structures to ARMv8-A assembly for macOS environments.
  • Code Porting: Developers working on porting software between these specific architectures.
  • Assembly Code Generation: Generating targeted ARMv8-A assembly from higher-level or different architectural descriptions.